| 摘要 |
Operate/release timing circuits are employed to generate time delayed pulse signals, for example, dial pulses, wink signals and other supervisory signals employed in telecommunications signaling systems. Pulse position and pulse width errors and other problems found in prior operate/release timers are resolved by employing a single digital counter and associated control logic elements. The timing circuit is controllably configured into several timer circuit arrangements including an integrating timer, AM timer, integrating timer including coast option, and AM timer including coast option. With the coast option enabled, initial noise immunity in the pulse signal is realized by resetting the counter to an initial state in response to any discontinuity in the input pulse signal until the input pulse signal is continuously present for a predetermined interval. Pulse break, gap and the like immunity is achieved by controlling the counter to count up for a predetermined interval regardless of the presence or absence of the input pulse signal. Once a valid input pulse has been detected and is terminated a timer output change of state is delayed for a so-called release delay interval. Once the pulse signal has terminated for a predetermined integrated interval the counter is controlled to continue counting down until the initial condition is reached regardless of the presence or absence of the input pulse signal. When the AM timer option is enabled the release interval is shortened by controllably resetting the counter to the initial condition upon the counter reaching the predetermined integrated interval.
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