发明名称 CHIP-SIZED SEMICONDUCTOR DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To avoid soldering defect, by covering a lead frame formed on the bottom of a package with a cover, and forming a part for exposing leads on the cover to avoid flowing of solder at the mounting. SOLUTION: A package 10 exposes a leaf frame 12 to outside from the bottom face. A cover 16 for covering the exposed face is formed on the exposed face of the lead frame 12 and uses a covering means for lowering the wetting force of solder such as insulting resin film or oxide film. An exposed part 18 is formed at a corresponding position to the leads 14 of the lead frame 12 on the cover 16, and the exposed part from the exposed part 18 provides a region for mounting a chip-sized semiconductor device. The bottom face of the package 10 is covered, excepts for the mounting region and hence the solder flow at mounting can be avoided. Thus, it is possible to avoid soldering defects such as bridges.</p>
申请公布号 JPH11251484(A) 申请公布日期 1999.09.17
申请号 JP19980055112 申请日期 1998.03.06
申请人 MITSUI HIGH TEC INC 发明人 FUJITA KATSUFUSA;NAKAJIMA TAKASHI
分类号 H01L23/12;H01L21/60;H01L23/28;(IPC1-7):H01L23/12 主分类号 H01L23/12
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