发明名称 CCD MEMORY
摘要 PURPOSE:To prevent generation of malfunctions even if noise is applied, by connecting a capacity element consisting of MISFET structure to one input terminal of a sense Amplifier and by balancing capacities of two input terminals. CONSTITUTION:Sense node 11 of CCD shift register 1 is connected to the source electrode of MOSFET 50, and the drain electrode of FET 50 is connected to one input of sense amplifier 2 and the drain electrode of MOSFET 52. Meanwhile, sense nodes 15a-15c of CCCD dummy registers 3a-3c are connected to source electrodes of MOSFETs 51a-51c respectively, and drain electrodes of FETs 51a-51c are connected to the other input of amplifier 2 and the drain electrode of MOSFET 53. Two MOSFETs 56 and 57 are connected to one input terminal of amplifier 2 to make numbers of MOSFETs connected to both input terminals of amplifier 2 equal to each other. As a result, capacity values of capacities C3 and C4 of one and the other input terminals of amplifier 2 are made equal to each other.
申请公布号 JPS55129993(A) 申请公布日期 1980.10.08
申请号 JP19790036861 申请日期 1979.03.30
申请人 HITACHI LTD 发明人 TAKECHI MAKOTO;SATOU YOUICHI
分类号 G11C11/56;G11C19/28;G11C27/04;H01L21/339;H01L29/762 主分类号 G11C11/56
代理机构 代理人
主权项
地址