发明名称
摘要 A comparator circuit comprising an amplifier having its input fed as a difference of a pair of inputs and whose gain is controlled by a control signal corresponding to the sum of the pair of inputs so as to provide an amplifier output which is stabilized over a large range of input variation.
申请公布号 JPS5443374(B2) 申请公布日期 1979.12.19
申请号 JP19720031342 申请日期 1972.03.29
申请人 发明人
分类号 H03G3/20;G02B7/28;G02B7/30;G02B7/32;H03K5/08 主分类号 H03G3/20
代理机构 代理人
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