A modem architecture and a method of reducing on-chip memory requirements in a downloadable modem architecture are provided. The preferred architecture consists of a Digital Signal Processor (DSP) (6) with on-chip Random Access Memory (RAM) (12). A procedure which exploits inactivity intervals in a modem modulation function is provided. The procedure dynamically downloads the requisite code segments for each phase of the function from a cheaper, slower external memory (14) into the DSP on-chip RAM during inactivity intervals, thereby reducing the DSP on-chip RAM requirements.
申请公布号
WO0025206(A1)
申请公布日期
2000.05.04
申请号
WO1998SG00086
申请日期
1998.10.26
申请人
STMICROELECTRONICS ASIA PACIFIC PTE LTD.;PAI, PRATIMA;DA COSTA, GODFREY;LEONG, FOO, YUEN