CIRCUIT FOR COMPENASTING DROPOUT OF TRIPPLE SIGNAL DECODER,申请号JP19780063105-传众专利搜索

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发明名称	CIRCUIT FOR COMPENASTING DROPOUT OF TRIPPLE SIGNAL DECODER
摘要
申请公布号	JPS54154221(A)	申请公布日期	1979.12.05
申请号	JP19780063105	申请日期	1978.05.26
申请人	GEN CORP	发明人	MITSUOKA KAZUNORI
分类号	H04N9/88;H04N5/76;H04N5/94	主分类号	H04N9/88
代理机构		代理人
主权项
地址

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