| 摘要 |
PURPOSE:To prevent the damage in error, by reducing the write-in power through the increase in the impurity concentration for the base surface part of transistor forming the memory cell. CONSTITUTION:The common collector layer 2 consisting of the N type layer is formed on the semiconductor substrate 1 consisting of the p type layer, the p<+> type base region 3 is formed on the specific part of the collector layer 2 and the emitter region 4 of N<+> type is formed at a part of the base region. The implanted layer 5 of N<+> type is formed between the substrate 1 and the collector layer 2, and the low resistance region 6 is connected to the implanted layer 5 from the surface of device. The p<+> region 7 having comparatively greater impurity concentration is formed at the surface of the base region 3. When pulse current is fed between the emitter 4 and the base 5, since the current concentrates on the P<+> type region 7, the junction destruction between the emitter and the base can be achieved with small current. |
