发明名称 Permutation memories
摘要 A permutation memory comprises an input control means for decoding, having a plurality L of inputs for an L-bit binary number, and a plurality 2L of outputs. Means are connected to the decoding means, for initiating the read-in of the L-bit number. Means are provided for applying an input signal. A first plurality of 2L of normally open switching means are connected to the 2L outputs of the decoding means and to the signal applying means. A plurality of 2L of means are connected to the switching means, for storing a charge when a specific switching means, connected to a corresponding charge storing means, is in a closed condition. A second plurality 2L of switching means are connected to the first plurality of switching means and to the charge storing means. An output control means, connected to the second plurality of switching means, reads out the states of the 2L charge-storing means, as to the amount of charge in each. Means are connected to the read-out means, for initiating the read-out.
申请公布号 US4164023(A) 申请公布日期 1979.08.07
申请号 US19770835765 申请日期 1977.09.22
申请人 U S OF AMERICA NAVY SECRETARY 发明人 SPEISER, JEFFREY M;WHITEHOUSE, HARPER J
分类号 G06G7/19;G11C27/02;(IPC1-7):G11C11/40 主分类号 G06G7/19
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