发明名称 NOISE ELIMINATOR CIRCUIT
摘要 PURPOSE:To prevent the generation of hop noises, etc., by reducing the variation in output level at the time of noise eliminatin by making it possible to correct the output waveform at the time of noise elimination by maintaining the variation in output waveform before the elimination as the output waveform at the time noise elimination. CONSTITUTION:This circuit is equipped with delay amplifier circuit 1 which compensates the time delay needed for noise detecting elimination, noise detection circuit 2 which detects a pulsive noise by being supplied with the input signal of circuit 1, and one-shot pulse generating circuit 3 which reveives the detection output of circuit 2 as its actuation input. Further, this is provided with differentiating circuit 4 supplied with the output of circuit 1, holding circuit 4 holding the output of circuit 4, and integrating circuit 6 supplied with the held output of circuit 4, thereby forming a waveform right before the noise generating pulse appears. Next, the output of circuit 1 is changed for the amplification output only while one- shot pulses of circuit 3 are being outputted, and the output of circuit 6 is outputted as output signal V0 via gate circuit 7.
申请公布号 JPS5472914(A) 申请公布日期 1979.06.11
申请号 JP19770139993 申请日期 1977.11.24
申请人 HITACHI LTD 发明人 HOUYA KAZUO;YAMAMURA MASAHIRO
分类号 H04B1/10;H03G3/34 主分类号 H04B1/10
代理机构 代理人
主权项
地址
您可能感兴趣的专利