| 摘要 |
A video processor for a track-while-scan radar system, wherein each radar return, within a tracking window, is given a range weight corresponding to the range bin within the range sweep and an angle weight corresponding to a sweep count, which is initiated at the commencement of the tracking window. The weights for each return are summed to obtain a range weighted sum and an angle weighted sum, each sum then being coupled to a computer along with the total number of radar returns recorded within the tracking window. The video processor, on information supplied by the computer, establishes an annular ring about the radar system within which radar returns are sought. To prevent the recording of a target detection upon the reception of a noise spike, a defruiting circuit is included in the search detection circuits which records a bit in a given range bin when the range bin under consideration in a given range sweep and at least one of the corresponding range bins in the preceding and succeeding range sweeps report a target return.
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