发明名称 MEMORY MATRIX
摘要 A memory device includes at least one memory plane comprising a plurality of substantially parallel memory lines serving as digit lines and arranged in a common plane, and plural pairs of lead wires, serving as word lines, with one lead wire of each pair extending along only one surface of the plane and the other lead wire extending along only the opposite surface of the plane, whereby one lead wire of each pair overlies all the memory lines and the other lead wire of each pair underlies all the memory lines, with the lead wires intersecting the memory lines at right angles. Plural pairs of insulated strings extend in parallel relation between respective pairs of adjacent memory lines, with the strings of each pair extending alternately above and below adjacent pairs of lead wires and crossing each other between such adjacent pairs of lead wires to clamp the same in position therebetween. Plural memory planes may be interconnected by the memory lines and the insulated strings, in the form of a ribbon cable. At least some of the memory lines have a surface plating of a magnetic alloy, and the lead wires are insulated wires or tapes.
申请公布号 US3611326(A) 申请公布日期 1971.10.05
申请号 USD3611326 申请日期 1968.03.13
申请人 OKI ELECTRIC INDUSTRY CO. LTD. 发明人 KIICHI SATO;ISAMU OGURA
分类号 G11C5/06;G11C5/08;G11C5/12;G11C11/04;(IPC1-7):G11C5/06;G11C11/14 主分类号 G11C5/06
代理机构 代理人
主权项
地址