DC removal circuit for VLF signals - removes DC offset component using monoflop, JK-flip flop, transistors and FETs

摘要

The dc removal circuit, for removing the dc offset component from a very low frequency signal, has the output of its monoflop connected to the input of the JK flip-flop and, over two series resistors, to the emitters of two transistors, whose bases are coupled to both outputs of the flipflop. The base-emitter junction of both transistors are shunted by two diodes. The collectors are coupled over diodes to the gates of two source-series FETs, the sources being coupled over a resistor to the output of an impedance converter at the input of the removal circuit.