| 摘要 |
PURPOSE:To obtain a delay with high accuracy by providing a means converting an initial value set with calculation or the like in response to a required delay into a value acquiring actually the required delay. CONSTITUTION:A code converter 9 receiving a value being the division of a full scale in response to a required delay as a control signal 3 converts the setting value and outputted to a delay generating element 1 in parallel. Upon the receipt of a latch enable signal, a TTL latch 11 latches a parallel signal being a control signal 3, supplies it to an internal digital analog converter(DAC) 12, the internal DAC 12 converts the digital signal into an analog signal and it is supplied to a comparator of a timing control circuit 13 as a threshold level deciding an output timing of an input signal 2. The comparator receives the threshold level as one input and a ramp voltage of a linear ramp generator is used as the other input, and when the ramp voltage reaches the threshold level or below, the output signal 4 is outputted to the outside of the device. Thus, the required delay is obtained with high accuracy. |
