发明名称 Semiconductor device and method forming patterns with spaced pads in trim region
摘要 In a semiconductor device, parallel first and second conductive lines having a unit width extend from a memory cell region into a connection region. A trim region in the connection region includes pads respectively connected to the first and second conductive lines but are separated by a width much greater than the unit width.
申请公布号 US9385134(B2) 申请公布日期 2016.07.05
申请号 US201414340710 申请日期 2014.07.25
申请人 Samsung Electronics Co., Ltd. 发明人 Min Jae-Ho;Kim Ki-Jeong;Shin Kyoung-Sub;Kim Dong-Hyun
分类号 H01L23/52;H01L23/48;H01L27/115;H01L27/02;H01L21/033;H01L21/3213;H01L27/32 主分类号 H01L23/52
代理机构 Volentine & Whitt, PLLC 代理人 Volentine & Whitt, PLLC
主权项 1. A semiconductor device comprising: a substrate comprising a memory cell region and a connection region; a plurality of first line groups, each of the plurality of first line groups comprising four first conductive lines extending on the substrate from the memory cell region in a first direction; a plurality of second line groups, each of the plurality of second line groups comprising four second conductive lines extending from the four first conductive lines in a second direction other than the first direction; a plurality of pad groups, each of the plurality of pad groups comprising four pads provided on the substrate and electrically connected to the four second conductive lines; a plurality of dummy lines extend from the plurality of pad groups; and a trim region that electrically opens the plurality of dummy lines, wherein a first line and a second line adjacent to each other in the four second conductive lines form a first line pair, and a third line and a fourth line adjacent to each other in the four second conductive lines form a second line pair, wherein a first extension region is disposed between the first and second line pairs, and each of the first and second line pairs comprises a second extension region.
地址 Suwon-si, Gyeonggi-do KR