| 摘要 |
<p>PURPOSE:To surely fetch data even if there is any dispersion in a clock frequency between a data device and an exchange by setting the transmission speed of the reception data slightly faster than the transmission speed of a digital data in an interface device. CONSTITUTION:An oscillating frequency of a clock source 11 of an exchange 1 and that of a clock source of a data device 3A differ by 10<-5>-10<-6> depending on the dispersion and since the frequency division by a PLL circuit 22 of an interface device 2C2 is implemented synchronously with the clock source 11 and the frequency divider output differs from the oscillating frequency of the oscillator 24 by 10<-5>-10<-6>, in total the deviation of nearly 2X10<-5>-2X10<-6> takes place. Since the extraction from a speed converter 21 is implemented based on the output of a frequency divider 23 obtaining a clock faster than the nominal data transmission reception speed of data devices 3A, 3B by 10<-3>, the data fetch not unable to be caught up with is avoided.</p> |
