发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
摘要 PURPOSE:To make it possible to contrive a reduction in the on resistance of a semiconductor device and to make it possible to contrive the enhancement of the performance of the device and an increase in the integration of the device. CONSTITUTION:For example, a low-concentration N-type layer 12 and an N<+> buried layer 13 of a concentration higher than that of this layer 12 are formed on and in a P-type substrate 11. N-type diffused drain layers 15, which are used as drain regions of a power use MSFET, P-type base regions 16, N<+> source regions 17, a gate oxide film 18, a gate polysilicon electrode 19, an insulating film 20, a source electrode 21, drain electrodes 22 and the like are formed in and on the main surface of the layer 12. In this case, the layers 15 are formed into a constitution, wherein they are formed by diffusing N-type impurities of a concentration higher than that of the N-type impurities of the layer 12 in the sidewalls of groove parts 31 formed in a depth, which reaches from the main surface of the layer 12 to the layer 13.
申请公布号 JPH07326742(A) 申请公布日期 1995.12.12
申请号 JP19940117049 申请日期 1994.05.30
申请人 TOSHIBA CORP 发明人 NAKANISHI KIKUO
分类号 H01L21/8222;H01L21/8248;H01L27/04;H01L27/06;H01L29/78 主分类号 H01L21/8222
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