Semiconductor device, display unit, and electronic apparatus

摘要

Provided is a semiconductor device that includes a transistor. The transistor includes: a gate electrode; an oxide semiconductor film facing the gate electrode and including a first overlapping region that is overlapped with the gate electrode; a low-resistance region provided in the oxide semiconductor film; and a first separation region provided between the low-resistance region and the first overlapping region.

主权项

1. A semiconductor device comprising
a transistor including
a gate electrode,an oxide semiconductor film facing the gate electrode and including
a first overlapping region that is overlapped with, and has a shape and size corresponding with the gate electrode in plan view,a first separation region provided outside of the first overlapping region in plan view, anda low resistance region provided outside the first separation region in plan view, such that the low resistance region is absent in both the first overlapping region and the first separation region in plan view,a gate insulating film provided between the gate electrode and the oxide semiconductor film,a first etching resistant film provided on a surface opposite to the gate insulating film of the gate electrode, the first etching resistant film having a width in a cross sectional view that is the same as a width of the gate electrode in a cross sectional view and including one of indium tin oxide, indium zinc oxide, and indium gallium zinc oxide, anda first sidewall covering a side surface of the gate insulating film, and formed in contact with the first separation region; and a capacitor that shares the oxide semiconductor film of transistor, the capacitor including
the oxide semiconductor film,a capacitor insulating film, anda first electrode that faces the oxide semiconductor film with the capacitor insulating film interposed in between,the oxide semiconductor film further including
a second overlapping region that is overlapped with, and has a shape and size corresponding with the first electrode in plan view, anda second separation region provided outside of the second overlapping region in plan view, andthe low resistance region is provided outside the second separation region in plan view, such that the low resistance region is absent in both the second overlapping region and the second separation region in plan view, anda second sidewall provided on a side surface of the first electrode and on a side surface of the capacitor insulating film, and is in contact with the second separation region, wherein the low resistance region extends between the transistor and capacitor to connect the first and second separation regions.