发明名称 Method for measuring source and drain junction depth in silicon on insulator technology
摘要 A method is provided for accurately determining the junction depth of silicon-on-insulator (SOI) devices. Embodiments include determining the junction depth in an SOI device under inspection by measuring the threshold voltage of its "bottom transistor" formed by its source and drain regions together with its substrate acting as a gate. The threshold voltage of the bottom transistor of an SOI device varies with its junction depth in a predictable way. Thus, the junction depth of the inspected device is determined by comparing its bottom transistor threshold voltage with the bottom transistor threshold voltage of corresponding reference SOI devices of known junction depth to find a match. For example, simulated SOI devices with the same characteristics as the inspected device, whose junction depth and bottom transistor threshold voltages have been previously calculated, are used as a "reference library". If the bottom transistor threshold voltage of the inspected device has about the same value as that of a particular one of the reference devices, then the inspected device has the junction depth of that particular reference device. Thus, junction depth of the inspected SOI device is accurately determined by a simple electrical measurement of threshold voltage.
申请公布号 US6475816(B1) 申请公布日期 2002.11.05
申请号 US20010781435 申请日期 2001.02.13
申请人 ADVANCED MICRO DEVICES, INC. 发明人 RICCOBENE CONCETTA;WONG NGA-CHING;THURGATE TIM
分类号 G01R31/27;H01L21/66;(IPC1-7):H01L21/66 主分类号 G01R31/27
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