发明名称 |
Differential input buffer with auxiliary bias pulser circuit |
摘要 |
An integrated circuit clock buffer is described which includes a pulser circuit having a delayed feedback to provide a pulsed signal in response to a transition in the external clock signal. The pulser circuit includes a delay element having an output node coupled to the input node of an inverter. The delay element and inverter are coupled between a first and second transistor. The buffer circuit generates non-skewed internal clock signals.
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申请公布号 |
US6486713(B2) |
申请公布日期 |
2002.11.26 |
申请号 |
US20010790525 |
申请日期 |
2001.02.23 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
WRIGHT JEFFREY P.;WILSON ALAN J. |
分类号 |
G11C7/10;G11C7/22;G11C8/18;(IPC1-7):H03K3/00 |
主分类号 |
G11C7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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