| 摘要 |
PROBLEM TO BE SOLVED: To provide a sampling clock reproducing circuit for suppressing low frequency jitters generated in the transmission of a reproducing sampling clock and improving follow-up characteristics. SOLUTION: This sampling clock reproducing circuit 10 on a reception side is provided with a clock generator 18, an angular velocity generation circuit 16, a phase angle generation circuit 17, a counter 14 and a subtraction circuit 15. Difference signals Δ=ΔS-ΔR are obtained in the subtraction circuit for frequency information ΔR from the counter 14 and the frequency information ΔS separated in a separation circuit 12 and the angular velocity generation circuit 16 is controlled. |
