Method of reducing hot electron injection type of read disturb in memory

摘要

Read disturb is reduced in a charge-trapping memory device such as a 3D memory device by optimizing the channel boosting voltage in an unselected NAND string. A pass voltage applied to the unselected word lines can cause a large gradient in the channel which leads to electron-hole formation and a hot electron injection (HEI) type of read disturb. When the selected word line is close to the source-side of the NAND string, HEI disturb occurs on the drain-side of the selected word line. To avoid this disturb, a spike is provided in the control gate voltage of a drain-side selected gate transistor to temporarily connect the channel to the bit line, lowering the voltage of the associated channel region. A similar approach is used for a drain-side selected word line. The spike may be omitted when the selected word line is mid-range.

主权项

1. A method for performing a sensing operation in a non-volatile memory device, the method comprising:
performing a boosting phase of the sensing operation, the boosting phase sets a boosting voltage of a channel of an unselected NAND string in the memory device, the unselected NAND string comprising a drain-end select gate at a drain-end of the unselected NAND string and a source-end select gate at a source-end of the unselected NAND string; after the boosting voltage is set, performing a sensing phase of the sensing operation, the sensing phase senses a current in a selected NAND string of the memory device, the selected NAND string comprising a drain-end select gate at a drain-end of the selected NAND string and a source-end select gate at a source-end of the selected NAND string; wherein: the memory device comprises multiple word lines of memory cells including a selected word line and unselected word lines; the selected NAND string and the unselected NAND strings each comprise a charge-trapping layer and a polysilicon channel layer which extend vertically in a three-dimensional stacked memory structure; and during the sensing phase, the current is sensed via a bit line which is connected to the drain-end of the selected NAND string and the drain-end of the unselected NAND string while one or more read voltages are applied to the selected word line; wherein the performing the boosting phase comprises:
applying an increasing voltage to the unselected word lines;if the selected word line is at a source-side of the unselected NAND string, controlling the drain-end select gate of the unselected NAND string to, at different times during the applying of the increasing voltage, allow a driven voltage on the bit line to reach the channel of the unselected NAND string by providing the drain-end select gate of the unselected NAND string in a conductive state and prevent the driven voltage on the bit line from reaching the channel of the unselected NAND string by providing the drain-end select gate of the unselected NAND string in a non-conductive state;if the selected word line is at a drain-side of the unselected NAND string, controlling the source-end select gate of the unselected NAND string to, at different times during the applying of the increasing voltage, allow a driven voltage on a source line to reach the channel of the unselected NAND string by providing the source-end select gate of the unselected NAND string in a conductive state and prevent the driven voltage on the source line from reaching the channel of the unselected NAND string by providing the source-end select gate of the unselected NAND string in a non-conductive state; andif the selected word line is midrange between the drain-end of the unselected NAND string and the source-end of the unselected NAND string, preventing the driven voltage on the bit line from reaching the channel of the unselected NAND string throughout the applying of the increasing voltage by providing the drain-end select gate of the unselected NAND string in a non-conductive state, and preventing the driven voltage on the source line from reaching the channel of the unselected NAND string throughout the applying of the increasing voltage by providing the source-end select gate of the unselected NAND string in a non-conductive state.