STORAGE IN CHARGE-TRAP MEMORY STRUCTURES USING ADDITIONAL ELECTRICALLY-CHARGED REGIONS

摘要

A device includes a memory and a read/write (R/W) unit. The memory includes multiple gates coupled to a common charge-trap layer. The R/W unit is configured to program and read the memory by creating and reading a set of electrically-charged regions in the common charge-trap layer, wherein at least a given region in the set is not uniquely associated with any single one of the gates.

主权项

1. An apparatus, comprising:
a plurality of memory cells, wherein each memory cell of the plurality of memory cells includes a respective control gate of a plurality of control gates, and wherein each control gate of the plurality of control gates is coupled to a common charge-trap layer; and a control circuit configured to:
create a first electrically-charged region in a first portion of the charge-trap layer associated with a first control gate and a second control gate of the plurality of control gates;receive a plurality of data bit values to be stored in the plurality of memory cells;store a first data bit value of the plurality of data bit values by creating a second electrically-charged region in a second portion of the charge-trap layer corresponding to the first control gate; andstore a second data bit value of the plurality of data bit values by creating a third electrically-charged region in a third portion of the charge-trap layer corresponding to the second control gate.