发明名称 Column redundancy system for a memory array
摘要 A memory array having a main memory array and a redundant memory array. The redundant memory array includes redundant memory arranged in replacement units to which memory of the main memory are mapped. Each replacement unit includes columns of redundant memory arranged in input-output (IO) groups and further includes columns of redundant memory from a plurality of IO groups. The IO groups have columns of memory associated with a plurality of different IOs and the plurality of IO groups of the replacement unit adjacent one another.
申请公布号 US9406404(B2) 申请公布日期 2016.08.02
申请号 US200711895072 申请日期 2007.08.22
申请人 Micron Technology, Inc. 发明人 Nakanishi Takuya;Nasu Takumi;Cowles Tim
分类号 G06F12/00;G11C29/00 主分类号 G06F12/00
代理机构 Dorsey & Whitney LLP 代理人 Dorsey & Whitney LLP
主权项 1. A memory array, comprising: a main memory array; and a redundant memory array having memory arranged in replacement units, each replacement unit comprising adjacent columns of the memory to which defective memory in the main memory array can be mapped, wherein at least two of the adjacent columns of the replacement units correspond to different input/outputs and are selected using different column select lines.
地址 Boise ID US
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