| 发明名称 |
Semiconductor device having features to prevent reverse engineering |
| 摘要 |
An electronic device includes: a base layer; a first layer located at least partially over the base layer; a second layer located at least partially over the first layer; a first metal layer located at least partially over the second layer, wherein one or more signal outputs of the electronic device are formed in the first metal layer; and a second metal layer located at least partially over the first metal layer, wherein one or more gate connection is formed in the second metal layer, wherein removing a portion of the second metal layer disrupts at least one gate connection and deactivates the device. |
| 申请公布号 |
US9466576(B2) |
申请公布日期 |
2016.10.11 |
| 申请号 |
US201514638199 |
申请日期 |
2015.03.04 |
| 申请人 |
Verisiti, Inc. |
发明人 |
Thacker, III William Eli |
| 分类号 |
H01L27/06;H01L23/52;H01L23/00;H01L23/522;H01L27/02;H01L23/528;H01L27/115;H01L29/788;H01L49/02 |
主分类号 |
H01L27/06 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An electronic circuit comprising:
a plurality of devices having connected floating gates; and a metal layer connected to the connected floating gates, wherein exposing the metal layer to an ion beam results in the failure of at least one of the plurality of devices. |
| 地址 |
Sanford NC US |
