| 发明名称 |
CONCURRENT VALIDATION OF HARDWARE UNITS |
| 摘要 |
A method includes holding a definition of multiple software-implemented tests for testing one or more hardware units of an Integrated Circuit (IC), and of invocation conditions that specify whether the tests are permitted to run. The tests are applied to the hardware units at least partially in parallel, using a processor in the IC, by repeatedly tracking respective execution states of the tests and evaluating the invocation conditions, and invoking a test that currently does not run but is permitted to run in accordance with the invocation conditions. |
| 申请公布号 |
US2016350163(A1) |
申请公布日期 |
2016.12.01 |
| 申请号 |
US201514722239 |
申请日期 |
2015.05.27 |
| 申请人 |
APPLE INC. |
发明人 |
Nahir Amir;Thelen Randal S.;Dagan Yair;Gonczarowski Yuval |
| 分类号 |
G06F11/07;G06F11/263 |
主分类号 |
G06F11/07 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An Integrated Circuit (IC), comprising:
one or more hardware units; and at least one processor, which is configured to hold a definition of multiple software-implemented tests for testing the hardware units, and of invocation conditions that specify whether the tests are permitted to run, and to apply the tests to the hardware units at least partially in parallel, by repeatedly tracking respective execution states of the tests and evaluating the invocation conditions, and invoking a test that currently does not run but is permitted to run in accordance with the invocation conditions. |
| 地址 |
Cupertino CA US |
