| 摘要 |
An apparatus and a method for testing a clock in a semiconductor integrated device are provided to test phase difference between an internal clock and an external clock in a wafer state. A delay unit(10,20,30) delays an internal clock. A comparison unit(40,50,60) compares the phase of an output signal of the delay unit with the phase of a reference clock. A phase discrimination part(70) outputs a discrimination signal by receiving a test mode signal, the reference clock and an output signal of the comparison unit. The comparison unit outputs a comparison signal with a first level when the phase of the reference clock leads the phase of the output signal of the delay unit, and outputs the comparison signal with a second level when the phase of the output signal of the delay unit leads the phase of the reference clock. |
