| 摘要 |
Current mirror circuit including a current input terminal (2), a current output terminal (6), a common terminal (8), a first transistor (T1) arranged between the current input terminal (2) and the common terminal (8), a second transistor (T2) arranged between the current output terminal (6) and the common terminal (8), a transconductance stage (TS) having an input terminal coupled to the current input terminal (2), and an output terminal coupled to the common terminal (8), and a bias source (22) for biasing the control electrodes of the first and second transistors (T1, T2). This configuration provides a large bandwidth independently of the input current, accurate current transfer and a single pole system.
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