发明名称 TESTING METHOD FOR SEMICONDUCTOR MANUFACTURING DEVICE
摘要 PROBLEM TO BE SOLVED: To reduce time required for an inspection step of an electronic device mounted on a semiconductor manufacturing device.SOLUTION: A testing method includes: preparing a first inspection panel TP1 including first inspection target connectors NC1a, NC1b, NC1c, NC1d that are mounted on a first connector surface and that respectively have a plurality of first terminals electrically connected to an electronic device; and preparing a second inspection panel TP2 including second inspection target connectors NC2a, NC2b, NC2c, NC2d that are mounted on a second connector surface and that respectively have a plurality of spring probes SP; and placing the first connector surface of the first inspection panel TP1 and the second connector surface of the second inspection panel TP2 to face each other, electrically connecting the plurality of first terminals included in the first inspection target connectors NC1a, NC1b, NC1c, NC1d to the plurality of spring probes SP included in the second inspection target connectors NC2a, NC2b, NC2c, NC2d, to thereby perform a functional check of electrical characteristics of the electronic device.SELECTED DRAWING: Figure 5
申请公布号 JP2016128784(A) 申请公布日期 2016.07.14
申请号 JP20150003527 申请日期 2015.01.09
申请人 RENESAS ELECTRONICS CORP 发明人 NAKAJIMA YUSUKE
分类号 G01R31/00 主分类号 G01R31/00
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