发明名称 |
Entry/Exit Control To/From a Low Power State in a CPU with an Unprotected Pipeline |
摘要 |
An embedded megamodule and an embedded CPU enable power-saving through a combination of hardware and software. The CPU configures the power-down controller (PDC) logic within megamodule and can software trigger a low-power state of logic blocks and memory during processor IDLE periods. To wake from this power-down state, a system event is asserted to the CPU through the module interrupt controller. Thus the entry into a low-power state is software-driven during periods of inactivity and power restoration is on system activity that demands the attention of the CPU.
|
申请公布号 |
US2008068238(A1) |
申请公布日期 |
2008.03.20 |
申请号 |
US20070855585 |
申请日期 |
2007.09.14 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
BELL DAVID Q.;ANDERSON TIMOTHY D.;NARDINI LEWIS;FLORES JOSE L.;LELL ANTHONY J. |
分类号 |
H03M1/00 |
主分类号 |
H03M1/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|