| 摘要 |
PROBLEM TO BE SOLVED: To provide a chip manufacturing method, wherein the operability is improved to reduce the cost. SOLUTION: Prepared is a chip array body (6) including: a first substrate (1) where elements (1A to 1I) as chips (7A to 7I) and adjacent portions (1A to I1) adjacent to the elements (1A to 1I) are arrayed; and a second substrate and a third substrate (2, 3) disposed with the first substrate (1) interposed therebetween and joined to the first substrate (1). The second substrate and third substrate (2, 3) are cut between the elements (1A to 1I) and adjacent portions (1A to 1I). COPYRIGHT: (C)2009,JPO&INPIT
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