发明名称 GATE DRIVER, DISPLAY APPARATUS AND GATE DRIVING METHOD
摘要 The present disclosure discloses a gate driver, a display apparatus and a gate driving method, to achieve a function of outputting a multi-pulse waveform by the gate driver. The gate driver according to the present disclosure comprises multiple groups of driving units, each group of driving units comprising N driving units each of which comprises a shift register and a logic circuit, wherein N is an integer larger than 1, and an output of a shift register is connected to a logic circuit in each driving unit. The shift registers multiplex multiple clock signals with different timings. Each of the shift registers outputs an output signal to a corresponding logic circuit. A part of a clock signal is selected by the logic circuit for output. In this way, a function of outputting a multi-pulse waveform by the gate driver is achieved, which prepares for a shift register having a function of threshold voltage compensation, to make a shift register capable of multi-row scanning become feasible on a display panel.
申请公布号 US2016372046(A1) 申请公布日期 2016.12.22
申请号 US201514770364 申请日期 2015.01.30
申请人 BOE TECHNOLOGY GROUP CO., LTD. 发明人 Wang Lirong;Duan Liye;Wu Zhongyuan
分类号 G09G3/3266;G11C19/28;G09G3/3258 主分类号 G09G3/3266
代理机构 代理人
主权项 1. A gate driver, comprising: multiple groups of driving units, each group of driving units comprising N driving units each of which comprises a shift register and a logic circuit, wherein N is an integer larger than 1, and an output of a shift register is connected to a logic circuit in each driving unit, wherein an output of a logic circuit in an mth driving unit is connected to a gate scan line of an mth row of pixels, and is connected to an input for a trigger signal of a shift register in an m+1th driving unit, wherein m is in a range of [1, M−1], and M is a total number of rows of pixels; an output of a logic circuit in a kth driving unit is connected to a reset of a k−(N−1)th of a shift register, wherein k is in a range of [N, M]; and all logic circuits in the multiple groups of driving units use a common logic circuit clock signal.
地址 Beijing CN