发明名称 METHOD FOR MANUFACTURING VIA HOLES BETWEEN LAYERS OF MULTI-LAYER PRINTED CIRCUIT BOARD
摘要 PURPOSE: A method for manufacturing via holes between layers is provided to equally form the via holes with micro sizes, on a high integrated multi-layer PCB(Printed Circuit Board). CONSTITUTION: A method for manufacturing via holes between layers comprises the steps of: forming an inner layer circuit by a selective corrosion method on a first conducting thin film(51), adhering to an upper/lower part of a first insulating film layer(50); accumulating a second insulating film layer(60) and a second conducting thin film(61) on an upper/lower part of the first conducting thin film(51), on which the inner layer circuit and the first insulating film layer(50) are formed; opening a contact window by corroding the second conducting thin film(61) in the selective corrosion method as the selected size rather than selected via holes, on a location to electrically connect the first conducting thin film(51) and the second conducting thin film(61); forming the via holes with the selected size on the second insulating film(60), exposed by irradiating a laser beam, having a beam spot which has the same size with the via holes, in the opened contact window; and spreading a third conducting film(70) to electrically connect the first conducting film(51) and the second conducting film(61) on the via holes.
申请公布号 KR20000025527(A) 申请公布日期 2000.05.06
申请号 KR19980042642 申请日期 1998.10.13
申请人 DAE DUCK ELECTRONICS CO., LTD. 发明人 KO, YOUNG JU
分类号 H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K3/46
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