| 摘要 |
<p>A Josephson memory circuit of simple construction and having a reduced number of power supply lines for each cell is disclosed. Each cell has a closed superconducting loop with a first Josephson gate included therein, a second Josephson gate electromagnetically coupling with the superconducting loop, a first line connected to the superconducting loop, a second line electromagnetically coupling with the first Josephson gate, and a third line connected to the second Josephson gate and electromagnetically coupling with the first Josephson gate. The first and second lines may be parallel to columns, and the third lines parallel to rows, of a cell matrix. The first and second Josephson gates are switched in response to coincidence of predetermined current levels in said first, second and third lines and the state of the second Josephson gates is detected by detecting means connected to the third lines.</p> |
