METHOD OF FORMING SHALLOW TRENCH ISOLATION (STI) STRUCTURES

摘要

A method of forming a trench isolation (e.g., an STI) for an integrated circuit includes forming a pad oxide layer and then a nitride layer over a semiconductor substrate, performing a trench etch through the structure to form a trench, depositing a trench oxide layer over the structure to form a filled trench, depositing a sacrificial planarizing layer, which is etch-selective to the trench oxide layer, over the deposited oxide, performing a planarizing etch process that removes the sacrificial planarizing layer and decreases surface variations in an upper surface of the trench oxide layer, performing an oxide etch process that is selective to the trench oxide layer to remove remaining portions of the trench oxide layer outside the filled trench, and removing the remaining nitride layer such that the remaining oxide-filled trench defines a trench isolation structure that projects above an exposed upper surface of the semiconductor substrate.

主权项

1. A method of forming a trench isolation structure for an integrated circuit, the method comprising:
forming a nitride layer over a semiconductor substrate; performing a trench etch process through portions of the nitride layer and the semiconductor substrate to form a trench; depositing a trench oxide layer over remaining portions of the nitride layer and extending into the trench to form a filled trench; depositing a sacrificial planarizing layer over the trench oxide layer, the sacrificial planarizing layer being etch-selective with respect to the trench oxide layer; performing a multi-step etch process that including:
a planarizing etch process that removes the sacrificial planarizing layer and decreases surface variations in an upper surface of the trench oxide layer;wherein the planarizing etch process includes at least one selective etch that is either selective to the sacrificial planarizing layer with respect to the trench oxide layer or selective to the trench oxide layer with respect to the sacrificial planarizing layer; and removing the remaining portions of the nitride layer such that the remaining oxide of the filled trench defines a trench isolation structure that projects above an exposed upper surface of the semiconductor substrate.