| 摘要 |
<p>A class II stackable 100 Mbps Ethernet repeater architecture (200) achievable by use of two different types of wired-OR interconnection in an Ethernet backplane, a Bus Transceiver Logic (BTL) wired-OR to select control, data and clock lines, and a highspeed Transistor-Transistor Logic (TTL) which is wired-OR'ed together in three-level logic on a common activity signal line. The backplanehas sufficiently low signal latency to permit two logical repeaters to be connected together with at least eight stackable repeater modules (210) in each logical repeater (200), each repeater module having thirteen to sixteen station ports (250) to support as many as 254 stations in a 100 Mbps environment with a diameter of205 meters, which is up to 8.5 times greater than previously achievable.</p> |
