Hybrid comparator and method

摘要

A data comparator that operates on an input voltage signal and a reference voltage signal is disclosed. Internally, the comparator includes replicated circuitry to produce differential gain. Each set of replicated circuitry includes two gain stages for high amplification, high sampling rate, and for reducing kickback noise at the input voltage signal and the reference voltage signal. The comparator may further include self-biased CMOS inverters for cancellation of input offset error and a rail-to-rail regenerative output latch. The circuit can also include a comparator bias circuit that can improve the speed of the auto-zero operation.