发明名称 RECEPTION SIGNAL DECISION CIRCUIT
摘要 PURPOSE:To compress the scale of a circuit, by providing a preset fixed signal generating means, a select means which replaces a reception fixed signal by a preset fixed signal, and a cyclic redundancy check operation/decision means. CONSTITUTION:The titled circuit is constituted of the preset fixed signal generating means 10 which generates the preset fixed signal, the select means which replaces the reception fixed signal by the preset fixed signal at the means 10, and a decision means 12 which performs the cyclic redundancy check (CRC) arithmetic operation of a signal constituted of the preset fixed signal outputted from the means 11 and a reception varing signal and decides the presence/ absence of a reception signal. When the preset fixed signal is different from the reception fixed signal, it is possible to decide the invalidity of the reception signal by performing the CRC arithmetic operation by the CRC arithmetic operation decision means 12. Therefore, since it is enough to provide only a decision part for a CRC arithmetic operation part as circuit constitution, thereby, the scale of the circuit can be compressed.
申请公布号 JPS63316931(A) 申请公布日期 1988.12.26
申请号 JP19870154007 申请日期 1987.06.19
申请人 FUJITSU LTD 发明人 DANKI RIYOUICHI;KATO TAKEO;MORIMOTO AKIO;NARITA KENJI;OKINO TAKAYUKI
分类号 H03M7/40 主分类号 H03M7/40
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