发明名称 Nonvolatile process compatible with a digital and analog double level metal MOS process
摘要 A floating gate transistor structure including a semiconductor substrate, an access gate dielectrically separated from the substrate, and a floating gate having (a) a first portion dielectrically separated from the substrate by a floating gate oxide region and a tunnel oxide region and (b) a second portion at last partially overlying and dielectrically separated from the access gate. A metal control gate overlies and is dielectrically separated from the floating gate. Also disclosed is a precision capacitor having a doped region as a first capacitor plate and a metal gate as a second capacitor plate. The floating gate transistor structure can be made with a process which includes the steps of forming a gate oxide layer on semiconductor substrate, forming an access gate on the gate oxide layer, and forming an interpoly oxide layer over the access gate and a floating gate oxide layer on the substrate laterally adjacent the gate oxide. A tunnel oxide region is formed in the floating gate oxide layer, and a floating gate is then formed on the interpoly oxide, the floating gate oxide, and the tunnel oxide. An oxide layer is formed over the floating gate, and a metal control gate is formed thereon. The precision capacitor is advantageously made pursuant to certain of the foregoing steps.
申请公布号 US4989053(A) 申请公布日期 1991.01.29
申请号 US19890329051 申请日期 1989.03.27
申请人 SHELTON, EVERETT K. 发明人 SHELTON, EVERETT K.
分类号 H01L21/8247;H01L29/788;H01L29/792 主分类号 H01L21/8247
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