发明名称 INTERMEDIARY CIRCUIT BETWEEN A LOW VOLTAGE LOGIC CIRCUIT AND A HIGH VOLTAGE OUTPUT STAGE IN STANDARD CMOS TECHNOLOGY
摘要 <p>The present invention relates to an intermediary circuit between a low voltage logic circuit and a high voltage output stage in standard CMOS technology. The output stage (20) is comprised of two transistors, respectively with N channel and P channel, achieved according to a standard CMOS technology. The intermediary circuit is comprised of a voltage level translator (21) coupled between an input logic circuit SL and said output stage (20). The voltage level translator (21) is achieved according to a standard CMOS technology and is comprised of at least two similar base blocks forming voltage mirrors interconnected in a cross-configuration. Said circuit is used to control transducers, plasma screens and electromechanical actuators.</p>
申请公布号 WO1993023926(A1) 申请公布日期 1993.11.25
申请号 CH1993000124 申请日期 1993.05.18
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