发明名称 LOGICAL CIRCUIT
摘要 PURPOSE:To prevent increment of the delay time of the output circuit owing to the noise which is generated in LSI, specially in the reference voltage, at the switching time of the memory output, and to reduce the delay time of the output circuit by using this noise reversely.
申请公布号 JPS52152153(A) 申请公布日期 1977.12.17
申请号 JP19760068815 申请日期 1976.06.14
申请人 HITACHI LTD 发明人 KITSUKAWA GOROU
分类号 H03K19/086 主分类号 H03K19/086
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