| 摘要 |
A SPC-telecommunication system comprises test points, operating points, data-bus interconnected data storage registers, a phase generator and an access signal generator. The registers include instruction registers for storage of instructions, and an unit-incrementing address register for storage of addresses identifying the instructions. The phase generator produces phase signals by which the processing cycles of the instructions are divided in phases. The access signal generator is controlled by the phase signals, the addresses and the instructions. For producing access signals in order to control the test points, operating points and registers, the access signal generator includes logic arrangements or units. A first logic unit decodes the contents of the address register during the beginning phase of the respective cycle and accesses the instruction register associated with the respective address during the other phases of the cycle. A second logic unit initiates a unit incrementing of the address register during a middle phase of each cycle. A third logic unit allows transfer of an address from one of the registers to the address register only during the end phase of the respective cycle. A fourth logic unit carrying out an AND-function has its inputs activated during the end phase of a cycle for accessing one of the test points and its output connecting to the unit-incrementing input of the address register. |
