发明名称 POWER SUPPLY SYSTEM
摘要 A chip set is configured such that a first overcurrent signal that is output at the time when there is an overcurrent in a first semiconductor switch or a third semiconductor switch and a second overcurrent signal that is output at the time when there is an overcurrent in a second semiconductor switch or a fourth semiconductor switch are input to input ports of an arithmetic processing unit.
申请公布号 US2016276823(A1) 申请公布日期 2016.09.22
申请号 US201615073051 申请日期 2016.03.17
申请人 Toyota Jidosha Kabushiki Kaisha 发明人 Himeno Takahiro;Oba Tomoko
分类号 H02H3/087;H02J1/00;H02J1/10 主分类号 H02H3/087
代理机构 代理人
主权项 1. A power supply system comprising: a positive electrode connection point and a negative electrode connection point to which a load circuit is connected, the positive electrode connection point and the negative electrode connection point being used to supply direct-current power to the load circuit; a specific power supply line that connects the positive electrode connection point with the negative electrode connection point, the specific power supply line including a first connection point located between the positive electrode connection point and the negative electrode connection point, a second connection point located between the first connection point and the negative electrode connection point, a third connection point located between the second connection point and the negative electrode connection point, and a fourth connection point located between the third connection point and the negative electrode connection point; a first direct-current power supply of which a positive electrode is connected to the first connection point and a negative electrode is connected to the third connection point; a second direct-current power supply of which a positive electrode is connected to the second connection point and a negative electrode is connected to the fourth connection point; a first diode interposed in a portion of the specific power supply line between the positive electrode connection point and the first connection point, a cathode of the first diode being on the positive electrode connection point side, and an anode of the first diode being on the first connection point side; a second diode interposed in a portion of the specific power supply line between the first connection point and the second connection point, a cathode of the second diode being on the first connection point side, and an anode of the second diode being on the second connection point side; a third diode interposed in a portion of the specific power supply line between the second connection point and the third connection point, a cathode of the third diode being on the second connection point side, and an anode of the third diode being on the third connection point side; a fourth diode interposed in a portion of the specific power supply line between the third connection point and the fourth connection point, a cathode of the fourth diode being on the third connection point side, and an anode of the fourth diode being on the fourth connection point side; a first semiconductor switch connected in antiparallel with the first diode; a second semiconductor switch connected in antiparallel with the second diode; a third semiconductor switch connected in antiparallel with the third diode; a fourth semiconductor switch connected in antiparallel with the fourth diode; and an electronic control unit configured to selectively execute any one of a parallel connection mode and a series connection mode by changing each of the first semiconductor switch to the fourth semiconductor switch between a conductive state and an interrupted state, the parallel connection mode being a mode in which the first direct-current power supply and the second direct-current power supply are connected to the load circuit in parallel with each other, the series connection mode being a mode in which the first direct-current power supply and the second direct-current power supply are connected to the load circuit in series with each other, the electronic control unit being configured to step up a terminal voltage of the first direct-current power supply or the second direct-current power supply and then apply the stepped-up voltage between the positive electrode connection point and the negative electrode connection point, or step down a voltage between the positive electrode connection point and the negative electrode connection point and then apply the stepped-down voltage to the first direct-current power supply or the second direct-current power supply, wherein each of the first semiconductor switch to the fourth semiconductor switch includes an overcurrent detection unit configured to output a detection signal when the overcurrent detection unit has detected overcurrent flowing through a corresponding one of the first semiconductor switch to the fourth semiconductor switch, the electronic control unit includes an arithmetic processing unit and a logic circuit unit, the arithmetic processing unit being configured to generate a control signal for changing each of the first semiconductor switch to the fourth semiconductor switch between the conductive state and the interrupted state, the logic circuit unit being configured to transmit the control signals to the first semiconductor switch to the fourth semiconductor switch and receive the detection signals from the first semiconductor switch to the fourth semiconductor switch, and the logic circuit unit is configured to, when the logic circuit unit has received the detection signal from the first semiconductor switch or the third semiconductor switch, output a first overcurrent signal to the arithmetic processing unit, the logic circuit unit is configured to, when the logic circuit unit has received the detection signal from the second semiconductor switch or the fourth semiconductor switch, output a second overcurrent signal to the arithmetic processing unit, and the logic circuit unit is configured to, when the logic circuit unit is receiving the detection signal from at least one of the first semiconductor switch to the fourth semiconductor switch, execute interruption process for keeping each of the first semiconductor switch to the fourth semiconductor switch in the interrupted state irrespective of the control signal.
地址 Toyota-shi Aichi-ken JP