发明名称 EDGE SUPER PROCESSING APPARATUS AND EDGE SUPER PROCESSING METHOD
摘要 PROBLEM TO BE SOLVED: To allow super processing by using super processors exclusive for videos in a 525 line system, for character video signals in a 1125 line system. SOLUTION: Super processing circuits 131-13m exclusive for videos in a 525 line system are arranged in parallel, and input memories 121-12m and output memories 141-14m are respectively arranged in the pre-and-post stages of each super processing circuit 131-13m. A memory controller 16 writes character video signals in a 1125 line system in the input memories 121-12m in each system only by the prescribed number of lines, and writes the character video signals in four more lines corresponding to edge width, and then reads them by a sampling frequency rate 13.5 MHz, and starts the write and read of the character video signals back in four lines for the input memory 122 in the next system in the write or read state of the character video signals for the input memory 121 in one system.
申请公布号 JP2001268394(A) 申请公布日期 2001.09.28
申请号 JP20000080699 申请日期 2000.03.22
申请人 TOSHIBA CORP 发明人 SUGIYAMA TOMOAKI;SHINOHARA NOBUTAKA;SHIRATORI MASAFUMI
分类号 H04N5/208;H04N5/262;(IPC1-7):H04N5/208 主分类号 H04N5/208
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