发明名称 Semiconductor device and method of manufacturing the same
摘要 A circuit including an inverter is provided for a wiring layer. A semiconductor device is provided with a wiring layer circuit which is formed over an insulating film and includes at least one inverter element. The inverter is provided with a first transistor element and a resistance element which is connected to the first transistor via a connection node. The first transistor element is provided with a gate electrode which is embedded in an interlayer insulating film including the insulating film, a gate insulating film which is formed over the interlayer insulating film and the gate electrode, and a first semiconductor layer which is formed over the gate insulating film between a source electrode and a drain electrode. The resistance element is provided with a second semiconductor layer which functions as a resistance. The first semiconductor layer and the second semiconductor layer are formed in the same layer.
申请公布号 US9496403(B2) 申请公布日期 2016.11.15
申请号 US201213710209 申请日期 2012.12.10
申请人 RENESAS ELECTRONICS CORPORATION 发明人 Kaneko Kishou;Sunamura Hiroshi;Hayashi Yoshihiro
分类号 H01L27/12;H01L29/786;H01L29/66;H01L27/088;H01L27/02;H01L49/02;H03K19/00;H01L27/06;H01L23/522;H01L23/528 主分类号 H01L27/12
代理机构 Young & Thompson 代理人 Young & Thompson
主权项 1. A semiconductor device including a wiring layer circuit which is formed over an insulating film, the semiconductor device including at least one inverter element, the inverter element comprising: a first transistor element; and a resistance element connected to the first transistor element via a connection node, the first transistor element including: a gate electrode embedded in an interlayer insulating film which includes the insulating film, the gate electrode being included in a first wiring layer;a gate insulating film formed over the interlayer insulating film and the gate electrode; anda first semiconductor layer formed over the gate insulating film between a source electrode and a drain electrode in a first region to cover the gate electrode, andthe resistance element including a second semiconductor layer functioning as a resistance and formed over the gate insulating film in a second region without the gate electrode and another gate electrode, the second semiconductor layer connected via a first wiring pattern of a second wiring layer to the first transistor element and via a second wiring pattern of the second wiring layer to a power source, wherein the first semiconductor layer and the second semiconductor layer are formed in the same layer, and the first wiring pattern and the second wiring pattern are formed in the same layer.
地址 Kanagawa JP
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