发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To form the lower layer line of extremely low contact resistance and small wiring resistance by a method wherein the connection of metal silicide wirings is performed to impurity diffused regions via low seat resistance layers. CONSTITUTION:An N<+> type source region 6a, an N<+> type region 6'b and an N<+> type polycrystalline Si gate electrode 5' are formed on a P type Si substrate 3 whereon element isolation insulation film 1 and P<+> channel cut regions 2 are formed. Via contact windows 9 of the lower layer PSG film 8, the second impurity, e.g. arsenic ion (As<+>) is implanted selectively into the surface layer part of the source region 6'a and the drain region 6'b, i.e. the high seat resistance layer 11. A MoSi2 wiring patterns 13 and a layer PSG film 14 are formed, the second As<+> implanted region is activated by heating, and thus the N<+> type low seat resistance regions 12' are formed on the surface layer part of the source and drain regions 6'a and 6'b.
申请公布号 JPS592320(A) 申请公布日期 1984.01.07
申请号 JP19820111050 申请日期 1982.06.28
申请人 FUJITSU KK 发明人 SATOU YASUHISA;BAN YASUTAKA
分类号 H01L29/78;H01L21/265 主分类号 H01L29/78
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