发明名称 COMPLEMENTARY TYPE SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To suppress the occurrence of latch up in an internal circuit, by providing an attenuating means, which positively attenuates the noise voltage of the voltage in a peripheral power source system and supplies said voltage to an internal power source system. CONSTITUTION:A positive noise voltage is applied to a Vcc terminal 1. When the noise voltage exceeds a breakdown voltage of an N-channel MOSFET7, the FET7 is broken down and the noise voltage on a peripheral power source line 2 is attenuated. The noise component on the peripheral power source line 2 is attenuated by the voltage across a resistance component 8. A filter is constituted by the capacity between the drain and the gate of an N-channel MOSFET9 and the resistance component 8. Thus, the potential fluctuation in the peripheral power source line 2 due to the noise voltage, which is applied on the power source terminal 1, is sufficiently attenuated in an internal power source line 5. The latch-up voltage at the power source terminal is well improved.
申请公布号 JPS60231355(A) 申请公布日期 1985.11.16
申请号 JP19840086829 申请日期 1984.04.27
申请人 MITSUBISHI DENKI KK 发明人 YAMADA TATSUO
分类号 H01L27/04;H01L21/822;H01L27/02;H01L27/08;H01L27/092 主分类号 H01L27/04
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