发明名称 Swap scan testing of digital logic
摘要 Apparatus and method for dynamically testing logic circuits transparent to their normal operation without placing restrictions on the logic circuit design. The apparatus is a swap scan register including an operational register for storing operational data and a test register for storing test data. The operational and test registers operate independently of each other. A swap circuit enables exchanging the operational and test register contents. According to the method disclosed after test data is stored in the test register, the operational register is interrupted and its contents swapped with the test register for one clock cycle. The test and operational registers are then swapped again to restore the original operational data to its pre-interrupt state and to provide test results in the test register.
申请公布号 US4831623(A) 申请公布日期 1989.05.16
申请号 US19870074101 申请日期 1987.07.16
申请人 RAYTHEON COMPANY 发明人 TERZIAN, JOHN
分类号 G01R31/3185;G06F11/22 主分类号 G01R31/3185
代理机构 代理人
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