PLL and phase detection circuit therefor

摘要

There is disclosed an integrated circuit including a phase detection circuit having an exclusive gate having first and second gate inputs for receiving first and second gate input signals. The exclusive gate provides at an output, a gate output signal that is the exclusive combination of the first and second gate input signals. A first switched resistance is coupled between a first voltage source and a common node. A second switched resistance, coupled between a second voltage source and the common node, receives the gate output signal of the exclusive gate to control the effective resistance thereof. The first and second resistances develop a signal at the common node. A comparator has a first input coupled to the common node and a second input coupled to a threshold value. The comparator output provides a signal that takes on a first value when the average value of the signal developed at the common node is less than the threshold, and a second value when the average value of the signal developed at the common node is greater than the threshold, with the result that the comparator output signal is indicative of whether the first and second gate input signals are in phase.