| 摘要 |
PROBLEM TO BE SOLVED: To provide an image processor that can reduce the utilizing rate of a data bus in the case of superimposing OSD data onto image data, improve the update frequency of image contents and reduce the storage capacity. SOLUTION: A RAM 1 stores image data 8, OSD data 7, and OSD mask data 6 and an image data transfer section 40 reads the data via a data bus 2. An 'image+OSD' data composition circuit 14 receives the three kinds of the data read from the RAM 1 in prescribed timing and superimposes the OSD data 7 onto the image data 8 according to the OSD mask data 6. The composited image by the 'image+OSD' data composition circuit 14 is directly fed to a video signal generating circuit 5, where the image is converted into a video signal of a prescribed format.
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