| 摘要 |
PROBLEM TO BE SOLVED: To provide a clock data recovery circuit capable of detecting a data period of input data, generating a high-speed clock having a frequency according to the data period of the detected input data, and reproducing data and clocks.SOLUTION: A clock data recovery circuit comprises: a sampling unit which generates a sampling result by sampling input data; a clock frequency control unit which determines the clock frequency used for sampling; a clock generating unit which generates a clock having the determined clock frequency; a phase comparing unit which generates phase error information on the basis of the sampling result and a reproduction clock; a numeric value control oscillating unit which generates a reproduction clock having a frequency according to the generated phase error information; and a regeneration unit which outputs reproduction data by regenerating the sampling result using the generated reproduction clock. The clock frequency control unit detects a data rate of input data, changes the clock frequency used for sampling according to the detected data rate, and generates a reproduction clock having the changed clock frequency and reproduction data.SELECTED DRAWING: Figure 2 |
